Compared to a conventional semiconductor power device, for example a trench MOSFET, having trenched gates filled with a single electrode padded by a gate insulation layer, a trench MOSFET having shielded gate structure as shown in FIG. 1A (U.S. Pat. No. 7,855,415) is more attractive due to its reduced capacitance between gate and drain in accordance with its reduced charges between the gate and the drain, and increased breakdown voltage of the trench MOSFET, making an excellent choice for power switching applications such as inventors and DC to DC power supply circuits. Furthermore, in order to enhance ESD (electronic static discharge) capability or avalanche capability, a clamp diode is conventionally integrated with and onto the trench MOSFET having shielded gate structure of the prior art, for example as shown FIG. 1B, an ESD clamp diode is applied onto the trench MOSFET for improving ESD capability. However, conventional technologies for manufacturing such integrated circuits are continuously challenged to further reduce the manufacturing cost by reducing the number of masks and poly-silicon layers applied in the manufacturing process. For example, the integrated circuit shown in FIG. 1B requires three poly-silicon layers for shielded electrodes 101, gate electrodes 102 and an ESD clamp diode, respectively, and also requires two mask layers to define the trenched gates having shielded gate structure and the ESD clamp diode in the manufacturing process. Moreover, in FIG. 1B, the N+ source region has a same doping concentration at a same distance from a top surface of an n epitaxial layer 103 and the N+ source region has a same junction depth along the top surface of the n epitaxial layer 103, which may result in a bad avalanche capability (U.S. Pat. No. 7,816,720).
Therefore, there is still a need in the art of the semiconductor power device fabrication, particular in the semiconductor power devices having shielded gate structure integrated with a clamp diode, to provide a novel cell structure, device configuration and fabrication process that would further reduce the number of masks and poly-silicon layers applied in the manufacturing process without additional costs and manufacturing process steps.